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Applications of zero-suppressed deci...

Butler, Jon T.

Applications of zero-suppressed decision diagrams[electronic resource] /

紀錄類型:	書目-電子資源 : Monograph/item
杜威分類號:	003
書名/作者:	Applications of zero-suppressed decision diagrams/ Tsutomu Sasao, Jon T. Butler.
作者:	Sasao, Tsutomu.
其他作者:	Butler, Jon T.
出版者:	[San Rafael, CA] : : Morgan & Claypool Publishers,, 2014.
面頁冊數:	1 online resource (124 p.)
標題:	Decision logic tables.
標題:	Logic circuits - Design.
標題:	Decision making - Mathematical models.
標題:	Logic, Symbolic and mathematical.
標題:	Graphic methods.
ISBN:	9781627056502
書目註:	Includes bibliographical references and index.
內容註:	Applications of zero-suppressed decision diagrams -- Abstract -- Contents -- Preface -- Acknowledgments -- Chapter 1. Introduction to Zero-Suppressed Decision Diagrams -- Chapter 2. Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions -- Chapter 3. The Power of Enumeration–BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion -- Chapter 4. Regular Expression Matching Using Zero-Suppressed Decision Diagrams -- Appendix A. Solutions -- Authors' and Editors' Biographies -- Index.
電子資源:	http://portal.igpublish.com/iglibrary/search/MCPB0000697.html

Applications of zero-suppressed decision diagrams[electronic resource] /
Sasao, Tsutomu.

Applications of zero-suppressed decision diagrams[electronic resource] /Tsutomu Sasao, Jon T. Butler. - [San Rafael, CA] :Morgan & Claypool Publishers,2014. - 1 online resource (124 p.) - Synthesis lectures on digital circuits and systems ;45. - Synthesis lectures on digital circuits and systems ;#31..

Includes bibliographical references and index.

Applications of zero-suppressed decision diagrams -- Abstract -- Contents -- Preface -- Acknowledgments -- Chapter 1. Introduction to Zero-Suppressed Decision Diagrams -- Chapter 2. Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions -- Chapter 3. The Power of Enumeration–BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion -- Chapter 4. Regular Expression Matching Using Zero-Suppressed Decision Diagrams -- Appendix A. Solutions -- Authors' and Editors' Biographies -- Index.

Source: 776780660000697Subjects--Topical Terms:

712542
Decision logic tables.
Index Terms--Genre/Form:

336502
Electronic books.

LC Class. No.: T57.95 / .S272 2015

Dewey Class. No.: 003

Applications of zero-suppressed decision diagrams[electronic resource] /
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100 1 $a Sasao, Tsutomu. $3 712540
245 1 0 $a Applications of zero-suppressed decision diagrams $h [electronic resource] / $c Tsutomu Sasao, Jon T. Butler.
260 $a [San Rafael, CA] : $b Morgan & Claypool Publishers, $c 2014.
300 $a 1 online resource (124 p.)
490 1 $a Synthesis lectures on digital circuits and systems ; $v 45
504 $a Includes bibliographical references and index.
505 0 $a Applications of zero-suppressed decision diagrams -- Abstract -- Contents -- Preface -- Acknowledgments -- Chapter 1. Introduction to Zero-Suppressed Decision Diagrams -- Chapter 2. Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions -- Chapter 3. The Power of Enumeration–BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion -- Chapter 4. Regular Expression Matching Using Zero-Suppressed Decision Diagrams -- Appendix A. Solutions -- Authors' and Editors' Biographies -- Index.
650 0 $a Decision logic tables. $3 712542
650 0 $a Logic circuits $x Design. $3 712543
650 0 $a Decision making $x Mathematical models. $3 337886
650 0 $a Logic, Symbolic and mathematical. $3 381130
650 0 $a Graphic methods. $3 481367
655 0 $a Electronic books. $2 local $3 336502
700 1 $a Butler, Jon T. $3 712541
830 0 $a Synthesis lectures on digital circuits and systems ; $v #31. $3 628471
856 4 0 $u http://portal.igpublish.com/iglibrary/search/MCPB0000697.html

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