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CMOS :circuit design, layout, and si...

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Baker, R. Jacob, (1964-)

CMOS :circuit design, layout, and simulation /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.39/732
書名/作者:	CMOS : : circuit design, layout, and simulation // Jake Baker.
作者:	Baker, R. Jacob,
出版者:	Hoboken, N.J. : : Wiley ;, c2010.
面頁冊數:	xxxiii, 1173 p. : : ill. ;; 25 cm.
標題:	Metal oxide semiconductors, Complementary - Design and construction.
標題:	Integrated circuits - Design and construction.
標題:	Metal oxide semiconductor field-effect transistors.
ISBN:	9780470881323 (hbk.) :
書目註:	Includes bibliographical references and index.

CMOS :circuit design, layout, and simulation /
Baker, R. Jacob,1964-

CMOS :circuit design, layout, and simulation /Jake Baker. - 3rd ed. - Hoboken, N.J. :Wiley ;c2010. - xxxiii, 1173 p. :ill. ;25 cm.

Includes bibliographical references and index.

ISBN: 9780470881323 (hbk.) :NTD 1,728Subjects--Topical Terms:

418300
Metal oxide semiconductors, Complementary
--Design and construction.

Dewey Class. No.: 621.39/732

CMOS :circuit design, layout, and simulation /
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245 1 0 $a CMOS : $b circuit design, layout, and simulation / $c Jake Baker.
250 $a 3rd ed.
260 $a Hoboken, N.J. : $b Wiley ; $a Piscataway, NJ : $b IEEE Press, $c c2010.
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504 $a Includes bibliographical references and index.
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650 0 $a Integrated circuits $x Design and construction. $3 343137
650 0 $a Metal oxide semiconductor field-effect transistors. $3 339142

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