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ESL design and verification[electronic resource] :a prescription for electronic system-level methodology /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.3815
書名/作者:	ESL design and verification : a prescription for electronic system-level methodology // Brian Bailey, Grant Martin, Andrew Piziali.
其他題名:	Electronic system-level design
作者:	Bailey, Brian,
其他作者:	Martin, Grant
出版者:	Amsterdam ; : Morgan Kaufmann,, c2007.
面頁冊數:	xxv, 462 p. : : ill. ;; 24 cm.
叢書名:	The Morgan Kaufmann series in systems on silicon
標題:	Systems on a chip - Design and construction.
ISBN:	9780123735515
ISBN:	0123735513
書目註:	Includes bibliographical references and index.
內容註:	CHAPTER 1 WHAT IS ESL? -- CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL? -- CHAPTER 5 ESL FLOW -- CHAPTER 6 SPECIFICATIONS AND MODELING -- CHAPTER 7 PRE-PARTITIONING ANALYSIS -- CHAPTER 8 PARTITIONING -- CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION -- CHAPTER 11 HARDWARE IMPLEMENTATION -- CHAPTER 12 SOFTWARE IMPLEMENTATION -- CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS -- APPENDIX: LIST OF ACRONYMS.
摘要、提要註:	Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts.
電子資源:	An electronic book accessible through the World Wide Web; click for information
電子資源:	An electronic book accessible through the World Wide Web; click for information
電子資源:	http://www.loc.gov/catdir/enhancements/fy0707/2006103541-d.html

ESL design and verification[electronic resource] :a prescription for electronic system-level methodology /
Bailey, Brian,1959-

ESL design and verificationa prescription for electronic system-level methodology /[electronic resource] :Electronic system-level designBrian Bailey, Grant Martin, Andrew Piziali. - Amsterdam ;Morgan Kaufmann,c2007. - xxv, 462 p. :ill. ;24 cm. - The Morgan Kaufmann series in systems on silicon.

Includes bibliographical references and index.

CHAPTER 1 WHAT IS ESL? -- CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL? -- CHAPTER 5 ESL FLOW -- CHAPTER 6 SPECIFICATIONS AND MODELING -- CHAPTER 7 PRE-PARTITIONING ANALYSIS -- CHAPTER 8 PARTITIONING -- CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION -- CHAPTER 11 HARDWARE IMPLEMENTATION -- CHAPTER 12 SOFTWARE IMPLEMENTATION -- CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS -- APPENDIX: LIST OF ACRONYMS.

Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts.

Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2007.

Mode of access: World Wide Web.

ISBN: 9780123735515

Source: 134627:134758Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:

416579
Systems on a chip
--Design and construction.Index Terms--Genre/Form:

336502
Electronic books.

LC Class. No.: TK7895.E42 / B326 2007eb

Dewey Class. No.: 621.3815

ESL design and verification[electronic resource] :a prescription for electronic system-level methodology /
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