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Three-dimensional integrated circuit...
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Friedman, Eby G.
Three-dimensional integrated circuit design[electronic resource] /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
杜威分類號:
621.3815
書名/作者:
Three-dimensional integrated circuit design/ Vasilis F. Pavlidis, Eby G. Friedman.
作者:
Pavlidis, Vasilis F.,
其他作者:
Friedman, Eby G.
出版者:
Amsterdam ; : Morgan Kaufmann,, c2009.
面頁冊數:
xv, 309 p. : : ill. ;; 25 cm.
叢書名:
The Morgan Kaufmann series in systems on silicon
標題:
Integrated circuits - Design and construction.
ISBN:
9780123743435
ISBN:
0123743435
書目註:
Includes bibliographical references (p. 289-303) and index.
內容註:
Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.
摘要、提要註:
With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance.
電子資源:
An electronic book accessible through the World Wide Web; click for information
電子資源:
An electronic book accessible through the World Wide Web; click for information
Three-dimensional integrated circuit design[electronic resource] /
Pavlidis, Vasilis F.,1976-
Three-dimensional integrated circuit design
[electronic resource] /Vasilis F. Pavlidis, Eby G. Friedman. - Amsterdam ;Morgan Kaufmann,c2009. - xv, 309 p. :ill. ;25 cm. - The Morgan Kaufmann series in systems on silicon.
Includes bibliographical references (p. 289-303) and index.
Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.
With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance.
Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2009.
Mode of access: World Wide Web.
ISBN: 9780123743435
Source: 152801:152956Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:
343137
Integrated circuits
--Design and construction.Index Terms--Genre/Form:
336502
Electronic books.
LC Class. No.: TK7874 / .P39 2009
Dewey Class. No.: 621.3815
Three-dimensional integrated circuit design[electronic resource] /
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http://www.sciencedirect.com/science/book/9780123743435
http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780123743435
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