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Towards a spin-ensemble quantum memo...
~
Grezes, Cecile.
Towards a spin-ensemble quantum memory for superconducting qubits[electronic resource] :design and implementation of the write, read and reset steps /
纪录类型:
书目-语言数据,印刷品 : Monograph/item
[NT 15000414] null:
006.3843
[NT 47271] Title/Author:
Towards a spin-ensemble quantum memory for superconducting qubits : design and implementation of the write, read and reset steps // by Cecile Grezes.
作者:
Grezes, Cecile.
出版者:
Cham : : Springer International Publishing :, 2016.
面页册数:
xiv, 231 p. : : ill. (some col.), digital ;; 24 cm.
Contained By:
Springer eBooks
标题:
Quantum computers.
标题:
Quantum computing.
标题:
Physics.
标题:
Quantum Information Technology, Spintronics.
标题:
Strongly Correlated Systems, Superconductivity.
标题:
Nanotechnology and Microengineering.
ISBN:
9783319215723
ISBN:
9783319215716
[NT 15000228] null:
Introduction -- Superconducting Circuits and Microwave Engineering -- NV Center Spins in Diamond -- Coupling Ensembles of Spins to Superconducting Circuits -- Spin-Based Quantum Memory -- Spin Ensemble Quantum Memory Protocol -- Simulations -- State of the Art & Principle of the Experiment -- Experimental Realization -- Operating the Hybrid Quantum Circuit -- Storage of Qubit States in a NV Spin Ensemble -- Conclusions on Experiment 1: The Write Step.
[NT 15000229] null:
This work describes theoretical and experimental advances towards the realization of a hybrid quantum processor in which the collective degrees of freedom of an ensemble of spins in a crystal are used as a multi-qubit register for superconducting qubits. A memory protocol made of write, read and reset operations is first presented, followed by the demonstration of building blocks of its implementation with NV center spins in diamond. Qubit states are written by resonant absorption of a microwave photon in the spin ensemble and read out of the memory on-demand by applying Hahn echo refocusing techniques to the spins. The reset step is implemented in between two successive write-read sequences using optical repumping of the spins.
电子资源:
http://dx.doi.org/10.1007/978-3-319-21572-3
Towards a spin-ensemble quantum memory for superconducting qubits[electronic resource] :design and implementation of the write, read and reset steps /
Grezes, Cecile.
Towards a spin-ensemble quantum memory for superconducting qubits
design and implementation of the write, read and reset steps /[electronic resource] :by Cecile Grezes. - Cham :Springer International Publishing :2016. - xiv, 231 p. :ill. (some col.), digital ;24 cm. - Springer theses,2190-5053. - Springer theses..
Introduction -- Superconducting Circuits and Microwave Engineering -- NV Center Spins in Diamond -- Coupling Ensembles of Spins to Superconducting Circuits -- Spin-Based Quantum Memory -- Spin Ensemble Quantum Memory Protocol -- Simulations -- State of the Art & Principle of the Experiment -- Experimental Realization -- Operating the Hybrid Quantum Circuit -- Storage of Qubit States in a NV Spin Ensemble -- Conclusions on Experiment 1: The Write Step.
This work describes theoretical and experimental advances towards the realization of a hybrid quantum processor in which the collective degrees of freedom of an ensemble of spins in a crystal are used as a multi-qubit register for superconducting qubits. A memory protocol made of write, read and reset operations is first presented, followed by the demonstration of building blocks of its implementation with NV center spins in diamond. Qubit states are written by resonant absorption of a microwave photon in the spin ensemble and read out of the memory on-demand by applying Hahn echo refocusing techniques to the spins. The reset step is implemented in between two successive write-read sequences using optical repumping of the spins.
ISBN: 9783319215723
Standard No.: 10.1007/978-3-319-21572-3doiSubjects--Topical Terms:
452747
Quantum computers.
LC Class. No.: QA76.889
Dewey Class. No.: 006.3843
Towards a spin-ensemble quantum memory for superconducting qubits[electronic resource] :design and implementation of the write, read and reset steps /
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design and implementation of the write, read and reset steps /
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