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SystemVerilog assertions and functio...

Mehta, Ashok B.

SystemVerilog assertions and functional coverage[electronic resource] :guide to language, methodology and applications /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.392
書名/作者:	SystemVerilog assertions and functional coverage : guide to language, methodology and applications // by Ashok B. Mehta.
作者:	Mehta, Ashok B.
出版者:	New York, NY : : Springer New York :, 2014.
面頁冊數:	xxxiii, 356 p. : : ill., digital ;; 24 cm.
Contained By:	Springer eBooks
標題:	Verilog (Computer hardware description language)
標題:	Electronic digital computers - Design and construction.
標題:	Integrated circuits - Verification.
標題:	Engineering.
標題:	Circuits and Systems.
標題:	Electronics and Microelectronics, Instrumentation.
標題:	Processor Architectures.
ISBN:	9781461473244 (electronic bk.)
ISBN:	9781461473237 (paper)
電子資源:	http://dx.doi.org/10.1007/978-1-4614-7324-4

SystemVerilog assertions and functional coverage[electronic resource] :guide to language, methodology and applications /
Mehta, Ashok B.

SystemVerilog assertions and functional coverageguide to language, methodology and applications /[electronic resource] :by Ashok B. Mehta. - New York, NY :Springer New York :2014. - xxxiii, 356 p. :ill., digital ;24 cm.

ISBN: 9781461473244 (electronic bk.)Subjects--Topical Terms:

418008
Verilog (Computer hardware description language)

Dewey Class. No.: 621.392

SystemVerilog assertions and functional coverage[electronic resource] :guide to language, methodology and applications /
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