大葉大學圖書館 |

Debug automation from pre-silicon to post-silicon[electronic resource] /

レコード種別:	言語・文字資料 (印刷物) : 単行資料
[NT 15000414] null:	621.395
タイトル / 著者:	Debug automation from pre-silicon to post-silicon/ by Mehdi Dehbashi, Gorschwin Fey.
著者:	Dehbashi, Mehdi.
その他の著者:	Fey, Gorschwin.
出版された:	Cham : : Springer International Publishing :, 2015.
記述:	xiv, 171 p. : : ill. (some col.), digital ;; 24 cm.
含まれています:	Springer eBooks
主題:	Integrated circuits - Very large scale integration
主題:	Integrated circuits - Very large scale integration
主題:	Engineering.
主題:	Circuits and Systems.
主題:	Processor Architectures.
主題:	Electronic Circuits and Devices.
国際標準図書番号 (ISBN) :	9783319093093 (electronic bk.)
国際標準図書番号 (ISBN) :	9783319093086 (paper)
[NT 15000228] null:	Introduction -- Preliminaries -- Part I Debug of Design Bugs -- Automated Debugging for Logic Bugs -- Automated Debugging from Pre-Silicon to Post-Silicon -- Automated Debugging for Synchronization Bugs -- Part II Debug of Delay Faults -- Analyzing Timing Variations -- Automated Debugging for Timing Variations -- Efficient Automated Speedpath Debugging -- Part III Debug of Transactions -- Online Debug for NoC-Based Multiprocessor SoCs -- Summary and Outlook.
[NT 15000229] null:	This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers. Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages; Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level; Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
電子資源:	http://dx.doi.org/10.1007/978-3-319-09309-3

Debug automation from pre-silicon to post-silicon[electronic resource] /
Dehbashi, Mehdi.

Debug automation from pre-silicon to post-silicon[electronic resource] /by Mehdi Dehbashi, Gorschwin Fey. - Cham :Springer International Publishing :2015. - xiv, 171 p. :ill. (some col.), digital ;24 cm.

Introduction -- Preliminaries -- Part I Debug of Design Bugs -- Automated Debugging for Logic Bugs -- Automated Debugging from Pre-Silicon to Post-Silicon -- Automated Debugging for Synchronization Bugs -- Part II Debug of Delay Faults -- Analyzing Timing Variations -- Automated Debugging for Timing Variations -- Efficient Automated Speedpath Debugging -- Part III Debug of Transactions -- Online Debug for NoC-Based Multiprocessor SoCs -- Summary and Outlook.

This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers. Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages; Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level; Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.

ISBN: 9783319093093 (electronic bk.)

Standard No.: 10.1007/978-3-319-09309-3doiSubjects--Topical Terms:

417282
Integrated circuits
--Very large scale integration

LC Class. No.: TK7874.75

Dewey Class. No.: 621.395

Debug automation from pre-silicon to post-silicon[electronic resource] /
LDR:02643nam a2200313 a 4500 001 424646
003 DE-He213
005 20150602171444.0
006 m d
007 cr nn 008maaau
008 151119s2015 gw s 0 eng d
020 $a 9783319093093 (electronic bk.)
020 $a 9783319093086 (paper)
024 7 $a 10.1007/978-3-319-09309-3 $2 doi
035 $a 978-3-319-09309-3
040 $a GP $c GP
041 0 $a eng
050 4 $a TK7874.75
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
082 0 4 $a 621.395 $2 23
090 $a TK7874.75 $b .D322 2015
100 1 $a Dehbashi, Mehdi. $3 602673
245 1 0 $a Debug automation from pre-silicon to post-silicon $h [electronic resource] / $c by Mehdi Dehbashi, Gorschwin Fey.
260 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2015.
300 $a xiv, 171 p. : $b ill. (some col.), digital ; $c 24 cm.
505 0 $a Introduction -- Preliminaries -- Part I Debug of Design Bugs -- Automated Debugging for Logic Bugs -- Automated Debugging from Pre-Silicon to Post-Silicon -- Automated Debugging for Synchronization Bugs -- Part II Debug of Delay Faults -- Analyzing Timing Variations -- Automated Debugging for Timing Variations -- Efficient Automated Speedpath Debugging -- Part III Debug of Transactions -- Online Debug for NoC-Based Multiprocessor SoCs -- Summary and Outlook.
520 $a This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers. Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages; Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level; Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
650 0 $a Integrated circuits $x Very large scale integration $x Testing. $3 417282
650 0 $a Integrated circuits $x Very large scale integration $x Design and construction. $3 418525
650 1 4 $a Engineering. $3 372756
650 2 4 $a Circuits and Systems. $3 463473
650 2 4 $a Processor Architectures. $3 463933
650 2 4 $a Electronic Circuits and Devices. $3 463910
700 1 $a Fey, Gorschwin. $3 602674
710 2 $a SpringerLink (Online service) $3 463450
773 0 $t Springer eBooks
856 4 0 $u http://dx.doi.org/10.1007/978-3-319-09309-3
950 $a Engineering (Springer-11647)

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