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Energy efficient hardware-software co-synthesis using reconfigurable hardware[electronic resource] /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.39/5
書名/作者:	Energy efficient hardware-software co-synthesis using reconfigurable hardware/ Jingzhao Ou, Viktor K. Prasanna.
作者:	Ou, Jingzhao.
其他作者:	Prasanna Kumar, V. K.
出版者:	Boca Raton, Fla : : Chapman & Hall/CRC,, c2010.
面頁冊數:	1 online resource (202 p.) : : ill.
標題:	Field programmable gate arrays - Energy consumption.
標題:	Field programmable gate arrays - Design and construction.
標題:	Adaptive computing systems - Energy consumption.
標題:	System design.
ISBN:	9781584887423 (electronic bk.)
ISBN:	1584887427 (electronic bk.)
書目註:	Includes bibliographical references (p. 187-195) and index.
內容註:	Cover; Title; Copyright; Contents; List of Tables; List of Figures; Acknowledgments; Preface; Chapter 1: Introduction; Chapter 2: Reconfigurable Hardware; Chapter 3: A High-Level Hardware-Software Application Development Framework; Chapter 4: Energy Performance Modeling and Energy Efficient Mapping for a Class of Applications; Chapter 5: High-Level Rapid Energy Estimation and Design Space Exploration; Chapter 6: Hardware-Software Co-Design for Energy Efficient Implementations of Operating Systems; Chapter 7: Concluding Remarks and Future Directions; References; Index;
摘要、提要註:	Energy dissipation and efficiency have prevented the widespread use of FPGA devices in embedded systems. Helping overcome these challenges, this book offers solutions for the development of energy efficient applications using FPGAs. It provides a framework for high-level hardware-software application development, describes energy performance modeling for reconfigurable system-on-chip devices, and explores energy efficient designs for various applications. The authors present a two-step rapid energy estimation technique that enables high-level design space exploration and offer a hardware-softw.
電子資源:	http://www.crcnetbase.com/isbn/978-1-58488-741-6

Energy efficient hardware-software co-synthesis using reconfigurable hardware[electronic resource] /
Ou, Jingzhao.

Energy efficient hardware-software co-synthesis using reconfigurable hardware[electronic resource] /Jingzhao Ou, Viktor K. Prasanna. - Boca Raton, Fla :Chapman & Hall/CRC,c2010. - 1 online resource (202 p.) :ill. - Chapman & Hall/CRC computer and information science series. - Chapman & Hall/CRC computer and information science series..

Includes bibliographical references (p. 187-195) and index.

Cover; Title; Copyright; Contents; List of Tables; List of Figures; Acknowledgments; Preface; Chapter 1: Introduction; Chapter 2: Reconfigurable Hardware; Chapter 3: A High-Level Hardware-Software Application Development Framework; Chapter 4: Energy Performance Modeling and Energy Efficient Mapping for a Class of Applications; Chapter 5: High-Level Rapid Energy Estimation and Design Space Exploration; Chapter 6: Hardware-Software Co-Design for Energy Efficient Implementations of Operating Systems; Chapter 7: Concluding Remarks and Future Directions; References; Index;

Energy dissipation and efficiency have prevented the widespread use of FPGA devices in embedded systems. Helping overcome these challenges, this book offers solutions for the development of energy efficient applications using FPGAs. It provides a framework for high-level hardware-software application development, describes energy performance modeling for reconfigurable system-on-chip devices, and explores energy efficient designs for various applications. The authors present a two-step rapid energy estimation technique that enables high-level design space exploration and offer a hardware-softw.

ISBN: 9781584887423 (electronic bk.)Subjects--Topical Terms:

558700
Field programmable gate arrays
--Energy consumption.Index Terms--Genre/Form:

336502
Electronic books.

LC Class. No.: TK7895.G36 / O94 2010eb

Dewey Class. No.: 621.39/5

Energy efficient hardware-software co-synthesis using reconfigurable hardware[electronic resource] /
LDR:02224cam a2200277Ka 4500 001 400756
003 OCoLC
005 20140108090644.0
006 m o d
007 cr cnu---unuuu
008 140127s2010 flua ob 001 0 eng d
020 $a 9781584887423 (electronic bk.)
020 $a 1584887427 (electronic bk.)
020 $z 9781584887416 (hbk.)
035 $a ocn668400737
040 $a N $b eng $c N $d EBLCP $d E7B $d VPI $d YDXCP $d OCLCQ $d MERUC $d OCLCQ $d DEBSZ $d OCLCQ
050 4 $a TK7895.G36 $b O94 2010eb
082 0 4 $a 621.39/5 $2 22
100 1 $a Ou, Jingzhao. $3 558698
245 1 0 $a Energy efficient hardware-software co-synthesis using reconfigurable hardware $h [electronic resource] / $c Jingzhao Ou, Viktor K. Prasanna.
260 $a Boca Raton, Fla : $b Chapman & Hall/CRC, $c c2010.
300 $a 1 online resource (202 p.) : $b ill.
490 1 $a Chapman & Hall/CRC computer and information science series
504 $a Includes bibliographical references (p. 187-195) and index.
505 0 $a Cover; Title; Copyright; Contents; List of Tables; List of Figures; Acknowledgments; Preface; Chapter 1: Introduction; Chapter 2: Reconfigurable Hardware; Chapter 3: A High-Level Hardware-Software Application Development Framework; Chapter 4: Energy Performance Modeling and Energy Efficient Mapping for a Class of Applications; Chapter 5: High-Level Rapid Energy Estimation and Design Space Exploration; Chapter 6: Hardware-Software Co-Design for Energy Efficient Implementations of Operating Systems; Chapter 7: Concluding Remarks and Future Directions; References; Index;
520 $a Energy dissipation and efficiency have prevented the widespread use of FPGA devices in embedded systems. Helping overcome these challenges, this book offers solutions for the development of energy efficient applications using FPGAs. It provides a framework for high-level hardware-software application development, describes energy performance modeling for reconfigurable system-on-chip devices, and explores energy efficient designs for various applications. The authors present a two-step rapid energy estimation technique that enables high-level design space exploration and offer a hardware-softw.
588 $a Description based on print version record.
650 0 $a Field programmable gate arrays $x Energy consumption. $3 558700
650 0 $a Field programmable gate arrays $x Design and construction. $3 418310
650 0 $a Adaptive computing systems $x Energy consumption. $3 558701
650 0 $a System design. $3 172186
655 0 $a Electronic books. $2 local $3 336502
700 1 $a Prasanna Kumar, V. K. $3 558699
830 0 $a Chapman & Hall/CRC computer and information science series. $3 487597
856 4 0 $u http://www.crcnetbase.com/isbn/978-1-58488-741-6