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Compiling algorithms for heterogeneous systems /

紀錄類型:	書目-電子資源 : Monograph/item
杜威分類號:	005.13
書名/作者:	Compiling algorithms for heterogeneous systems // Steven Bell, Jing Pu, James Hegarty, Mark Horowitz.
作者:	Bell, Steven,
其他作者:	Pu, Jing,
出版者:	[San Rafael, California] : : Morgan & Claypool,, 2018.
面頁冊數:	1 PDF (xv, 89 pages) : : illustrations.
附註:	Part of: Synthesis digital library of engineering and computer science.
標題:	Domain-specific programming languages.
標題:	Image processing - Digital techniques.
ISBN:	9781627057301
書目註:	Includes bibliographical references (pages 83-87).
內容註:	1. Introduction -- 1.1 CMOS scaling and the rise of specialization -- 1.2 What will we build now? -- 1.2.1 Performance, power, and area -- 1.2.2 Flexibility -- 1.3 The cost of specialization -- 1.4 Good applications for acceleration --
摘要、提要註:	Most emerging applications in imaging and machine learning must perform immense amounts of computation while holding to strict limits on energy and power. To meet these goals, architects are building increasingly specialized compute engines tailored for these specific tasks. The resulting computer systems are heterogeneous, containing multiple processing cores with wildly different execution models. Unfortunately, the cost of producing this specialized hardware--and the software to control it--is astronomical. Moreover, the task of porting algorithms to these heterogeneous machines typically requires that the algorithm be partitioned across the machine and rewritten for each specific architecture, which is time consuming and prone to error. Over the last several years, the authors have approached this problem using domain-specific languages (DSLs): high-level programming languages customized for specific domains, such as database manipulation, machine learning, or image processing. By giving up generality, these languages are able to provide high-level abstractions to the developer while producing high-performance output. The purpose of this book is to spur the adoption and the creation of domain-specific languages, especially for the task of creating hardware designs. In the first chapter, a short historical journey explains the forces driving computer architecture today. Chapter 2 describes the various methods for producing designs for accelerators, outlining the push for more abstraction and the tools that enable designers to work at a higher conceptual level. From there, Chapter 3 provides a brief introduction to image processing algorithms and hardware design patterns for implementing them. Chapters 4 and 5 describe and compare Darkroom and Halide, two domain-specific languages created for image processing that produce high-performance designs for both FPGAs and CPUs from the same source code, enabling rapid design cycles and quick porting of algorithms. The final section describes how the DSL approach also simplifies the problem of interfacing between application code and the accelerator by generating the driver stack in addition to the accelerator configuration. This book should serve as a useful introduction to domain-specialized computing for computer architecture students and as a primer on domain-specific languages and image processing hardware for those with more experience in the field.
電子資源:	http://ieeexplore.ieee.org/servlet/opac?bknumber=8268727

Compiling algorithms for heterogeneous systems /
Bell, Steven,

Compiling algorithms for heterogeneous systems /Steven Bell, Jing Pu, James Hegarty, Mark Horowitz. - [San Rafael, California] :Morgan & Claypool,2018. - 1 PDF (xv, 89 pages) :illustrations. - Synthesis lectures on computer architecture,# 431935-3243 ;. - Synthesis digital library of engineering and computer science..

Part of: Synthesis digital library of engineering and computer science.

Includes bibliographical references (pages 83-87).

1. Introduction -- 1.1 CMOS scaling and the rise of specialization -- 1.2 What will we build now? -- 1.2.1 Performance, power, and area -- 1.2.2 Flexibility -- 1.3 The cost of specialization -- 1.4 Good applications for acceleration --

Abstract freely available; full-text restricted to subscribers or individual document purchasers.

Compendex

Most emerging applications in imaging and machine learning must perform immense amounts of computation while holding to strict limits on energy and power. To meet these goals, architects are building increasingly specialized compute engines tailored for these specific tasks. The resulting computer systems are heterogeneous, containing multiple processing cores with wildly different execution models. Unfortunately, the cost of producing this specialized hardware--and the software to control it--is astronomical. Moreover, the task of porting algorithms to these heterogeneous machines typically requires that the algorithm be partitioned across the machine and rewritten for each specific architecture, which is time consuming and prone to error. Over the last several years, the authors have approached this problem using domain-specific languages (DSLs): high-level programming languages customized for specific domains, such as database manipulation, machine learning, or image processing. By giving up generality, these languages are able to provide high-level abstractions to the developer while producing high-performance output. The purpose of this book is to spur the adoption and the creation of domain-specific languages, especially for the task of creating hardware designs. In the first chapter, a short historical journey explains the forces driving computer architecture today. Chapter 2 describes the various methods for producing designs for accelerators, outlining the push for more abstraction and the tools that enable designers to work at a higher conceptual level. From there, Chapter 3 provides a brief introduction to image processing algorithms and hardware design patterns for implementing them. Chapters 4 and 5 describe and compare Darkroom and Halide, two domain-specific languages created for image processing that produce high-performance designs for both FPGAs and CPUs from the same source code, enabling rapid design cycles and quick porting of algorithms. The final section describes how the DSL approach also simplifies the problem of interfacing between application code and the accelerator by generating the driver stack in addition to the accelerator configuration. This book should serve as a useful introduction to domain-specialized computing for computer architecture students and as a primer on domain-specific languages and image processing hardware for those with more experience in the field.

Mode of access: World Wide Web.

ISBN: 9781627057301

Standard No.: 10.2200/S00816ED1V01Y201711CAC043doiSubjects--Topical Terms:

624617
Domain-specific programming languages.
Subjects--Index Terms:

domain-specific languagesIndex Terms--Genre/Form:

336502
Electronic books.

LC Class. No.: QA76.7 / .B453 2018

Dewey Class. No.: 005.13

Compiling algorithms for heterogeneous systems /
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504 $a Includes bibliographical references (pages 83-87).
505 0 $a 1. Introduction -- 1.1 CMOS scaling and the rise of specialization -- 1.2 What will we build now? -- 1.2.1 Performance, power, and area -- 1.2.2 Flexibility -- 1.3 The cost of specialization -- 1.4 Good applications for acceleration --
505 8 $a 2. Computations and compilers -- 2.1 Direct specification -- 2.2 Compilers -- 2.3 High-level synthesis -- 2.4 Domain-specific languages --
505 8 $a 3. Image processing with stencil pipelines -- 3.1 Image signal processors -- 3.2 Example applications --
505 8 $a 4. Darkroom: a stencil language for image processing -- 4.1 Language description -- 4.2 A simple pipeline in darkroom -- 4.3 Optimal synthesis of line-buffered pipelines -- 4.3.1 Generating line-buffered pipelines -- 4.3.2 Shift operator -- 4.3.3 Finding optimal shifts -- 4.4 Implementation -- 4.4.1 ASIC and FPGA synthesis -- 4.4.2 CPU compilation -- 4.5 Evaluation -- 4.5.1 Scheduling for hardware synthesis -- 4.5.2 Scheduling for general-purpose processors -- 4.6 Summary --
505 8 $a 5. Programming CPU/FPGA systems from Halide -- 5.1 The Halide language -- 5.2 Mapping Halide to hardware -- 5.3 Compiler implementation -- 5.3.1 Architecture parameter extraction -- 5.3.2 IR transformation -- 5.3.3 Loop perfection optimization -- 5.3.4 Code generation -- 5.4 Implementation and evaluation -- 5.4.1 Programmability and efficiency -- 5.4.2 Quality of hardware generation -- 5.5 Conclusion --
505 8 $a 6. Interfacing with specialized hardware -- 6.1 Common interfaces -- 6.2 The challenge of interfaces -- 6.3 Solutions to the interface problem -- 6.3.1 Compiler support -- 6.3.2 Library interface -- 6.3.3 API plus DSL -- 6.4 Drivers for darkroom and halide on FPGA -- 6.4.1 Memory and coherency -- 6.4.2 Running the hardware -- 6.4.3 Generating systems and drivers -- 6.4.4 Generating the whole stack with Halide -- 6.4.5 Heterogeneous system performance --
505 8 $a 7. Conclusions and future directions -- Bibliography -- Authors' biographies.
506 $a Abstract freely available; full-text restricted to subscribers or individual document purchasers.
510 0 $a Compendex
510 0 $a INSPEC
510 0 $a Google scholar
510 0 $a Google book search
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