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Low power interconnect design[electr...

Saini, Sandeep.

Low power interconnect design[electronic resource] /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.3815
書名/作者:	Low power interconnect design/ by Sandeep Saini.
作者:	Saini, Sandeep.
出版者:	New York, NY : : Springer New York :, 2015.
面頁冊數:	xvii, 152 p. : : ill. (some col.), digital ;; 24 cm.
Contained By:	Springer eBooks
標題:	Interconnects (Integrated circuit technology) - Design.
標題:	Engineering.
標題:	Circuits and Systems.
標題:	Electronics and Microelectronics, Instrumentation.
標題:	Processor Architectures.
ISBN:	9781461413233 (electronic bk.)
ISBN:	9781461413226 (paper)
內容註:	Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.
電子資源:	http://dx.doi.org/10.1007/978-1-4614-1323-3

Low power interconnect design[electronic resource] /
Saini, Sandeep.

Low power interconnect design[electronic resource] /by Sandeep Saini. - New York, NY :Springer New York :2015. - xvii, 152 p. :ill. (some col.), digital ;24 cm.

Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.

ISBN: 9781461413233 (electronic bk.)

Standard No.: 10.1007/978-1-4614-1323-3doiSubjects--Topical Terms:

604224
Interconnects (Integrated circuit technology)
--Design.

LC Class. No.: TK7874.53

Dewey Class. No.: 621.3815

Low power interconnect design[electronic resource] /
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