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Source-synchronous networks-on-chip[...

Khatri, Sunil P.

Source-synchronous networks-on-chip[electronic resource] :circuit and architectural interconnect modeling /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.381531
書名/作者:	Source-synchronous networks-on-chip : circuit and architectural interconnect modeling // by Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra.
作者:	Mandal, Ayan.
其他作者:	Khatri, Sunil P.
出版者:	New York, NY : : Springer New York :, 2014.
面頁冊數:	xiii, 143 p. : : ill. (some col.), digital ;; 24 cm.
Contained By:	Springer eBooks
標題:	Networks on a chip - Design.
標題:	Engineering.
標題:	Circuits and Systems.
標題:	Processor Architectures.
標題:	Electronics and Microelectronics, Instrumentation.
ISBN:	9781461494058 (electronic bk.)
ISBN:	9781461494041 (paper)
電子資源:	http://dx.doi.org/10.1007/978-1-4614-9405-8

Source-synchronous networks-on-chip[electronic resource] :circuit and architectural interconnect modeling /
Mandal, Ayan.

Source-synchronous networks-on-chipcircuit and architectural interconnect modeling /[electronic resource] :by Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra. - New York, NY :Springer New York :2014. - xiii, 143 p. :ill. (some col.), digital ;24 cm.

ISBN: 9781461494058 (electronic bk.)Subjects--Topical Terms:

610721
Networks on a chip
--Design.

Dewey Class. No.: 621.381531

Source-synchronous networks-on-chip[electronic resource] :circuit and architectural interconnect modeling /
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