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Cerny, Eduard.

概要

作品:	9 作品在 2 项出版品 1 种语言

书目信息

SVA[electronic resource] :The Power of Assertions in SystemVerilog / by: Cerny, Eduard.; SpringerLink (Online service) (书目-语言数据,印刷品)

The power of assertions in SystemVerilog[electronic resource] / by: Cerny, Eduard.; SpringerLink (Online service) (书目-语言数据,印刷品)

主题

Verilog (Computer hardware description language) SystemVerilog (Computer hardware description language) Processor Architectures. Circuits and Systems. Engineering. Electrical Engineering. Integrated circuits Electronic Circuits and Devices.

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