Toward 5G software defined radio rec...
Spiridon, Silvian.

 

  • Toward 5G software defined radio receiver front-ends[electronic resource] /
  • 紀錄類型: 書目-電子資源 : Monograph/item
    杜威分類號: 621.384
    書名/作者: Toward 5G software defined radio receiver front-ends/ by Silvian Spiridon.
    作者: Spiridon, Silvian.
    出版者: Cham : : Springer International Publishing :, 2016.
    面頁冊數: xvii, 96 p. : : ill. (some col.), digital ;; 24 cm.
    Contained By: Springer eBooks
    標題: Software radio.
    標題: Wireless communication systems.
    標題: Engineering.
    標題: Circuits and Systems.
    標題: Signal, Image and Speech Processing.
    標題: Electronics and Microelectronics, Instrumentation.
    ISBN: 9783319327594
    ISBN: 9783319327587
    內容註: Overview of Wireless Communication in the Internet Age -- Defining the optimal architecture -- From High Level Standard Requirements to Circuit Level Electrical Specifications: A Standard Independent Approach -- Optimal Filter Partitioning -- Smart Gain Partitioning for Noise - Linearity Trade-Off Optimization -- SDRX Electrical Specifications -- A System Level Perspective of Modern Receiver Building Blocks -- Conclusions and Future Developers.
    摘要、提要註: This book introduces a new intuitive design methodology for the optimal design path for next-generation software defined radio front-ends (SDRXs) The methodology described empowers designers to "attack" the multi-standard environment in a parallel way rather than serially, providing a critical tool for any design methodology targeting 5G circuits and systems. Throughout the book the SDRX design follows the key wireless standards of the moment (i.e., GSM, WCDMA, LTE, Bluetooth, WLAN), since a receiver compatible with these standards is the most likely candidate for the first design iteration in a 5G deployment. The author explains the fundamental choice the designer has to make regarding the optimal channel selection: how much of the blockers/interferers will be filtered in the analog domain and how much will remain to be filtered in the digital domain. The system-level analysis the author describes entails the direct sampling architecture is treated as a particular case of mixer-based direct conversion architecture. This allows readers give a power consumption budget to determine how much filtering is required on the receive path, by considering the ADC performance characteristics and the corresponding blocker diagram.
    電子資源: http://dx.doi.org/10.1007/978-3-319-32759-4
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