大葉大學圖書館 |

Circuit design for reliability[electronic resource] /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.3815
書名/作者:	Circuit design for reliability/ edited by Ricardo Reis, Yu Cao, Gilson Wirth.
其他作者:	Reis, Ricardo.
出版者:	New York, NY : : Springer New York :, 2015.
面頁冊數:	vi, 272 p. : : ill. (some col.), digital ;; 24 cm.
Contained By:	Springer eBooks
標題:	Integrated circuits - Design and construction.
標題:	Integrated circuits - Reliability.
標題:	Engineering.
標題:	Circuits and Systems.
標題:	Quality Control, Reliability, Safety and Risk.
標題:	Computer-Aided Engineering (CAD, CAE) and Design.
ISBN:	9781461440789 (electronic bk.)
ISBN:	9781461440772 (paper)
內容註:	Introduction -- Recent Trends in Bias Temperature Instability -- Charge trapping phenomena in MOSFETS: From Noise to Bias Temperature Instability -- Atomistic Simulations on Reliability -- On-chip characterization of statistical device degradation -- Circuit Resilience Roadmap -- Layout Aware Electromigration Analysis of Power/Ground Networks -- Power-Gating for Leakage Control and Beyond -- Soft Error Rate and Fault Tolerance Techniques for FPGAs.
摘要、提要註:	This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.
電子資源:	http://dx.doi.org/10.1007/978-1-4614-4078-9

Circuit design for reliability[electronic resource] /
Circuit design for reliability[electronic resource] /edited by Ricardo Reis, Yu Cao, Gilson Wirth. - New York, NY :Springer New York :2015. - vi, 272 p. :ill. (some col.), digital ;24 cm.

Introduction -- Recent Trends in Bias Temperature Instability -- Charge trapping phenomena in MOSFETS: From Noise to Bias Temperature Instability -- Atomistic Simulations on Reliability -- On-chip characterization of statistical device degradation -- Circuit Resilience Roadmap -- Layout Aware Electromigration Analysis of Power/Ground Networks -- Power-Gating for Leakage Control and Beyond -- Soft Error Rate and Fault Tolerance Techniques for FPGAs.

This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

ISBN: 9781461440789 (electronic bk.)

Standard No.: 10.1007/978-1-4614-4078-9doiSubjects--Topical Terms:

343137
Integrated circuits
--Design and construction.

LC Class. No.: TK7874

Dewey Class. No.: 621.3815

Circuit design for reliability[electronic resource] /
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