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More than Moore technologies for next generation computer design[electronic resource] /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
杜威分類號:	621.39
書名/作者:	More than Moore technologies for next generation computer design/ edited by Rasit O. Topaloglu.
其他作者:	Topaloglu, Rasit O.
出版者:	New York, NY : : Springer New York :, 2015.
面頁冊數:	ix, 218 p. : : ill. (some col.), digital ;; 24 cm.
Contained By:	Springer eBooks
標題:	Computer engineering.
標題:	Computer organization.
標題:	Engineering.
標題:	Circuits and Systems.
標題:	Electronics and Microelectronics, Instrumentation.
標題:	Processor Architectures.
ISBN:	9781493921638 (electronic bk.)
ISBN:	9781493921621 (paper)
內容註:	Impact of TSV and Device Scaling on the Quality of 3D Ics -- 3D Integration Technology -- Design and Optimization of Spin-Transfer Torque MRAMs -- Embedded STT-MRAM: Device and Design -- A Thermal and Process Variation Aware MTJ Switching Model and Its Applications in Soft Error Analysis -- Nano-Photonic Networks-on-Chip for Future Chip Multiprocessors -- Design Automation for On-chip Nanophotonic Integration.
摘要、提要註:	This book provides a comprehensive overview of key technologies being used to address challenges raised by continued device scaling and the extending gap between memory and central processing unit performance. Authors discuss in detail what are known commonly as "More than Moore" (MtM), technologies, which add value to devices by incorporating functionalities that do not necessarily scale according to "Moore's Law". Coverage focuses on three key technologies needed for efficient power management and cost per performance: novel memories, 3D integration and photonic on-chip interconnect.
電子資源:	http://dx.doi.org/10.1007/978-1-4939-2163-8

More than Moore technologies for next generation computer design[electronic resource] /
More than Moore technologies for next generation computer design[electronic resource] /edited by Rasit O. Topaloglu. - New York, NY :Springer New York :2015. - ix, 218 p. :ill. (some col.), digital ;24 cm.

Impact of TSV and Device Scaling on the Quality of 3D Ics -- 3D Integration Technology -- Design and Optimization of Spin-Transfer Torque MRAMs -- Embedded STT-MRAM: Device and Design -- A Thermal and Process Variation Aware MTJ Switching Model and Its Applications in Soft Error Analysis -- Nano-Photonic Networks-on-Chip for Future Chip Multiprocessors -- Design Automation for On-chip Nanophotonic Integration.

This book provides a comprehensive overview of key technologies being used to address challenges raised by continued device scaling and the extending gap between memory and central processing unit performance. Authors discuss in detail what are known commonly as "More than Moore" (MtM), technologies, which add value to devices by incorporating functionalities that do not necessarily scale according to "Moore's Law". Coverage focuses on three key technologies needed for efficient power management and cost per performance: novel memories, 3D integration and photonic on-chip interconnect.

ISBN: 9781493921638 (electronic bk.)

Standard No.: 10.1007/978-1-4939-2163-8doiSubjects--Topical Terms:

411802
Computer engineering.

LC Class. No.: TK7885

Dewey Class. No.: 621.39

More than Moore technologies for next generation computer design[electronic resource] /
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505 0 $a Impact of TSV and Device Scaling on the Quality of 3D Ics -- 3D Integration Technology -- Design and Optimization of Spin-Transfer Torque MRAMs -- Embedded STT-MRAM: Device and Design -- A Thermal and Process Variation Aware MTJ Switching Model and Its Applications in Soft Error Analysis -- Nano-Photonic Networks-on-Chip for Future Chip Multiprocessors -- Design Automation for On-chip Nanophotonic Integration.
520 $a This book provides a comprehensive overview of key technologies being used to address challenges raised by continued device scaling and the extending gap between memory and central processing unit performance. Authors discuss in detail what are known commonly as "More than Moore" (MtM), technologies, which add value to devices by incorporating functionalities that do not necessarily scale according to "Moore's Law". Coverage focuses on three key technologies needed for efficient power management and cost per performance: novel memories, 3D integration and photonic on-chip interconnect.
650 0 $a Computer engineering. $3 411802
650 0 $a Computer organization. $3 172077
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650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 463474
650 2 4 $a Processor Architectures. $3 463933
700 1 $a Topaloglu, Rasit O. $3 606987
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