| 紀錄類型: |
書目-語言資料,印刷品
: Monograph/item
|
| 杜威分類號: |
621.395 |
| 書名/作者: |
Low-power design of nanometer FPGAs : architecture and EDA // by Hassan Hassan, Mohab Anis. |
| 作者: |
Hassan, Hassan A., |
| 其他作者: |
Anis, Mohab. |
| 出版者: |
Amsterdam ; : Elsevier ;, c2010. |
| 面頁冊數: |
1 online resource (xiv, 241 p.) : : ill. |
| 附註: |
Description based on print version record. |
| 標題: |
Field programmable gate arrays - Computer-aided design. |
| 標題: |
Nanoelectromechanical systems - Computer-aided design. |
| 標題: |
Low voltage integrated circuits - Computer-aided design. |
| 標題: |
Integrated circuits - Very large scale integration. |
| ISBN: |
9780080922348 (electronic bk.) |
| ISBN: |
0080922341 (electronic bk.) |
| 書目註: |
Includes bibliographical references (p. 221-235) and index. |
| 內容註: |
FPGA Architectures -- Power Consumption in Nanometer FPGAs -- Power Modeling and Estimation Techniques in FPGAs -- Dynamic Power Reduction -- Leakage Power Reduction -- Low-Power FPGA Design in Future CMOS Technologies. |
| 摘要、提要註: |
Field Programmable Gate Arrays (FPGAs) have become very popular as embedded components on computing platforms. An FPGA is a viable, reprogrammable design approach that provides a fast time-to-market alternative to Application Specific Integrated Circuits (ASICs). Since FPGA implementations can be customized to fit for any application, their versatility leads to performance gains, and enables reuse of expensive silicon. Although high performance can be achieved in FPGAs, their high levels of power consumption pose a critical design challenge. This book will be an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques will be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign. Design perspective on low-power FPGAs ... low-power techniques presented at key FPGA design levels for circuits, architectures, and electronic design automation, form critical, "bridge" guidelines for codesign; Low-leakage design in FPGAs ... comprehensive review of leakage-tolerant techniques empowers designers to minimize power dissipation; FPGA power estimation techniques ... provides valuable tools for estimating power efficiency/savings of current, low-power FPGA design techniques. |
| 電子資源: |
An electronic book accessible through the World Wide Web; click for information |
| 電子資源: |
An electronic book accessible through the World Wide Web; click for information |
| 電子資源: |
http://www.netlibrary.com/urlapi.asp?action=summary&v=1&bookid=248998 |
| 電子資源: |
Click here to view book |